You hear a lot these days about the programmability of software defined networks. Reworking software-based architectures is a lot easier, and much more dynamic, than reconfiguring hardware infrastructure. But along with programmability, emerging networks have the opportunity to enable another key function: customization.
These two concepts are related but distinct. Programmability enables the network to rapidly adapt to shifting data loads and traffic patterns, while customization tends more toward longer-term configurations that address the unique challenges of individual data environments.
There is little doubt that programmability is best handled in software, and is in fact the key selling point for SDN. But some are starting to wonder whether customization may be better left to hardware, in particular the silicon that populates physical infrastructure.
The idea has caught on at none other than Intel, which this week unveiled the new Xeon E5-2600 v3 device, the former Grantley-EP project. Taking a cue from the ODM suppliers that are fueling the hyperscale infrastructure movement, Intel has begun designing specialized versions of the chip for key customers. Microsoft, for one is using its specialty chips to enable crucial functions like accelerated encryption and improved compression that otherwise would have to be implemented in software, which would ultimately expand overhead to the processing load and potentially increase latency.
According to Intel datacenter group general manager Diane Bryant, this kind of functionality is in preparation for an age when data infrastructure is tailored to the needs of users, rather than the other way around. As she told the Intel Developer Forum this week, customization will likely inhabit the entire stack, from the virtual/software layer to the accelerator, the SoC and the instruction set architecture. This is part of the reason the company launched the Network Builders program, which in less than a year has gathered support from Oracle, HP, Citrix, Dell and other industry leaders.
When you start talking about hardware customization, however, it isn’t long before the conversation turns to the field programmable gate array (FPGA). These devices are shipped in a rudimentary state and are then programmed by the distributor or even the end user shortly before deployment. This allows the chip to perform a wide range of specialized functions that are not available on standard CPUs. Microsoft is working with FPGAs to increase the performance of its Bing search engine, concentrating largely on improving the PCIe performance of SuperMicro servers for various accelerator cards. The chief advantage of the FPGA vs. a specialized chip is that the former can be reprogrammed more easily should network software change.
This may be well and good for top consumers like Microsoft, but what about the average enterprise? Is there a chance that customization could make its way to the network controller? At the moment, most of the work is taking place either on long-haul networks or on memory or CPU architectures. Altera Communications, for example, offers a range of FPGAs, SoCs, ASICs and other devices suitable for 100G optical networks, OpenCL parallel programming environments and Intel’s QuickPath interconnect. However, its partner Intilop is working with the Altera Stratix IV and V FPGA to provide 16K TCP acceleration for cloud and data center networks.
So for the moment, the fully customizable physical network remains elusive. But if FPGAs and other solutions start to provide new levels of flexibility elsewhere in the hardware environment, it won’t be long before enterprise designers start clamoring for the same functionality on the network.
Hardware still won’t be the most exciting aspect of the modern network, but it will provide crucial flexibility where it counts.
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