Broadcom Debuts MIPS Network Silicon

When it comes to networking silicon, speed matters. It’s a reality that Broadcom understands well and aims to address with its new XLP900 Series of MIPS processors.

The XLP900 multi-core CPU family is a MIPS-based solution that can scale up to 1.28 trillion operations per second of compute performance. The XLP900 has multiple target market verticals, including wireless infrastructure, storage, and security applications.

Chris O’Reilly, senior director of Broadcom’s Processors & Wireless Infrastructure Business, explained that each processor has up to 80 nxCPUs on it. O’Reilly explained that an nxCPU is about threading, with four or more nxCPUs per processor core. The top-end XLP900 chip has 20 cores on the chip.

“Each nxCPU has the ability to operate independently of the other to reserve the memory cache and issue instructions as it sees fit,” O’Reilly said. “It acts like a core, but it does re-use some of the core elements of core0 on the silicon.”

Having multiple nxCPUs per core improves latency. Any time a core goes to memory, a certain amount of latency can be involved.

“If we have multiple nxCPUs within a core, we can more efficiently utilize the core’s resources to provide better performance,” O’Reilly said.


The XLP900 involves the use of the MIPS architecture. The XLP900 uses a combination of MIPS64 and 32 bit micro-cores.

“We have an architectural license with MIPS, so we have customized the 64-bit CPU cores to be suitable for the applications that we serve,” O’Reilly said. “The 32-bit MIPS cores are part of the packet pre-processing and are off-the-shelf MIPS cores.”

Deep Packet Inspection

One of the use cases for the XLP900 is in network security. The chip includes an integrated Grammar Processing Engine, used for protocol recognition and application identification.

“This enables customers to do protocol processing at 40 Gbps,” O’Reilly said. “We also have 40 Gbps Deep Packet Inspection (DPI) engine, as well as encryption and authentication capabilities.”

As to why the security capabilities are only 40 Gbps and not at the 160 Gbps that the XLP900 as a chip offers, O’Reilly said that it’s based on workloads.

“The reason that we only included 40 Gbps of throughput for the DPI engine is we don’t have any customers that are developing boxes that need 160 Gbps of DPI throughput,” O’Reilly said. “40 Gbps, based on our customers’ interactions, is going to be more than enough.”

Sean Michael Kerner is a senior editor at ServerWatch and Follow him on Twitter @TechJournalist.

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